A High-Frequency Transconductance Method for Characterization of High-k Border Traps in III-V MOSFETs

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A novel method that reveals the spatial distribution of border traps in III-V MOSFETs is presented. The increase in transconductance with frequency is explored in a very wide frequency range (1Hz to 70 GHz) and a distributed RC network is used to model the oxide and trap capacitances. An evaluation of vertical InAs nanowire MOSFETs and surface-channel InGaAs MOSFETs with Al2O3/HfO2 high-κ gate dielectric shows a deep border trap density of about 10 cmeV and a nearinterfacial trap density of about 10 cmeV. The latter, cause an almost step-like increase in transconductance at 1-10 GHz. This demonstrates the importance of high frequency characterization of high-κ dielectrics in III-V MOSFETs.

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تاریخ انتشار 2017